We are an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability status, protected veteran status or any other characteristic protected by law.
The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications.
- Ability to obtain and maintain a US government security clearance
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- Experience developing FPGA projects and IP cores from concept to deployment, including design, simulation, testing, optimization, release, and maintenance
- Proficiency with FPGA design tools (Vivado, Quartus Prime), hardware description languages (VHDL, Verilog), hardware simulation software (GHDL, Questa)
- Experience working with programmable SoCs and development platforms from Xilinx or Intel (Versal, Zynq, Agilex, Stratix) and implementing communication between software and hardware
- Strong programming skills in scripting languages (Python, Tcl) and C/C++ for hardware/software integration
- Experience implementing standard IP core interfaces (AXI, ACE, Avalon)
- Strong analytical and problem-solving skills, with the ability to manage complex hardware design issues effectively
- Hands-on experience with hardware testing, instrumentation, and debugging tools (ILA, VIO)
- Strong documentation skills and the ability to convey complex information clearly and effectively
- Collaborative mind-set and excellent communication skills to work effectively with cross-functional teams
Preferred Qualifications
- Advanced degree (M.S. or Ph.D.) in Electrical Engineering, Computer Engineering, or a related field
- Knowledge of cryptographic algorithms and experience implementation mathematical algorithms in hardware
- Experience in hardware security, tamper detection, and anti-reverse engineering techniques
- Experience with hardware acceleration techniques for computationally intensive tasks
- Familiarity with Python-based FPGA verification tools (cocotb, pyuvm)
This position is currently accepting applications.
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